30 April 2024 to 3 May 2024
Amsterdam, Hotel CASA
Europe/Amsterdam timezone

Studies on track finding algorithms based on machine learning with GPU and FPGA

30 Apr 2024, 14:25
3m
Oxford, Hotel CASA

Oxford, Hotel CASA

Flashtalk with Poster Session A 1.4 Hardware acceleration & FPGAs

Speaker

Maria Carnesale

Description

Track finding in high-density environments is a key challenge for experiments at modern accelerators. In this presentation we describe the performance obtained running machine learning models for a typical Muon High Level Trigger at LHC experiments. These models are designed for hit position reconstruction and track pattern recognition with a tracking detector, on a commercially available Xilinx FPGA: Alveo U50, Alveo U250, and Versal VCK5000. We compare the inference times obtained on a CPU, on a GPU and on the FPGA cards. These tests are done using TensorFlow libraries as well as the TensorRT framework, and software frameworks for AI-based applications acceleration. The inference times obtained are compared to the needs of present and future experiments at LHC.

Primary authors

Presentation materials