30 April 2024 to 3 May 2024
Amsterdam, Hotel CASA
Europe/Amsterdam timezone

Hardware implementation of quantum machine learning predictors for ultra-low latency applications

30 Apr 2024, 13:42
20m
Oxford, Hotel CASA

Oxford, Hotel CASA

Talk without Poster 1.4 Hardware acceleration & FPGAs

Speaker

Andrea Triossi (University of Padova)

Description

Tensor Networks (TNs) is a computational paradigm used for representing quantum many-body systems. Recent works show how TNs can be applied to perform Machine Learning (ML) tasks, yielding comparable results to standard supervised learning techniques. In particular [1] leveraged Tree Tensor Networks (TTNs) to achieve the classification of particle flavor state in the context of High Energy Physics.

In this work, we want to analyze the use of TTNs in high-frequency real-time applications like online trigger systems. Indeed, TTN-based algorithms can be deployed in online trigger boards, by exploiting low latency hardware like FPGA. Besides, FPGAs are known to be suitable for inherently concurrent tasks like matrix multiplications. When implementing biologically inspired neural network on FPGA the goal is to keep the design as small as possible to cope with the resource limitations. Pruning is the primary technique adopted for removing parameters that do not substantially contribute to the performance of the ML task. On the other hand, quantum features of the TTN like quantum correlations or entanglement entropy can be mapped to properties of the network that can help in the pruning process identifying unnecessary features or nodes [2]. This makes TTNs good candidates for efficient hardware implementation.

We will show different implementations of a TTNs classifier on FPGA capable of performing inference on a classical dataset used for ML benchmarking. A preparatory analysis of bond dimensions, features ordering, and weight quantization, done in the training phase, will lead to the choice of the TTN architecture. The generated TTNs will be deployed on hardware accelerator. Using an FPGA integrated in a server we will completely offload the inference of the TTN. Finally, a projection of the needed resources for the hardware implementation of a classifier for the application in HEP will be provided by comparing how different degrees of parallelism obtained in hardware affect physical resources and latency.

[1] Timo Felser et al. “Quantum-inspired machine learning on high-energy physics data”. In: npj Quantum Information (2021).
[2] Yoav Levine et al. “Deep Learning and Quantum Entanglement: Fundamental Connections with Implications to Network Design”. In: International Conference on Learning Representations (2018)

Primary authors

Lorenzo Borella (University of Padova) Alberto Coppi (University of Padova) Jacopo Pazzini (University of Padova) Andrea Stanco (University of Padova) Andrea Triossi (University of Padova) Marco Zanetti (University of Padova)

Presentation materials